FERRO SCRAP NIGAM LIMITED

FERRO SCRAP NIGAM LIMITED
(A Government of India Undertaking)

Ferro Scrap Nigam Limited is a Government of India Undertaking engaged in rendering specialised services to the integrated Steel Plants in Scrap Recovery & Processing. The units of FSNL are situated at Rourkela, Burnpur, Bhilai, Bokaro, Visakhapatnam, Durgapur, Dolvi near Mumbai, Duburi near Jajpur Road (Orissa) & Raigarh (Chhattisgarh) and the Registered Office of the company is situated at Bhilai. The Company is on the look out for experienced candidates to meet the requirement of executives in the discipline of MAINTENANCE (Mechanical & Electlrical), MATERIALS and PERSONNEL & ADMINISTRATION, as detailed below:

A) MAINTENANCE (MECHANICAL & ELECTRICAL)

ASSTT. GENERAL MANAGER Rs.17500-400-22300/-

MANAGER Rs. 16000-400-20800/-

B) OPERATIONS

ASSTT. GENERAL MANAGER Rs.17500-400-22300/-

MANAGER Rs. 16000-400-20800/-

C) MATERIALS MANAGEMENT

ASSTT. GENERAL MANAGER Rs.17500-400-22300/-

MANAGER Rs. 16000-400-20800/-

D) PERSONNEL & ADMINISTRATION

MANAGER Rs.16000-400-20800/-

HOW TO APPLY

Application should be submitted on plain paper in A-4 size affixing a recent passport size photograph on the right side at the top of the application, in the format stating (1) Name of the post (2) Name of the applicant (in block capital letters), (3) Father’s name, (4) Date of birth and age as on 1/9/08 (5) Category (SC/ST/OBC/PH/Gen), (6) Present postal address for communication (7) Permanent address, (8) Academic/Professional qualification in the following proforma:

The application in an envelope superscribing the post applied for along with a crossed Demand Draft of Rs. 100/- (SC/ST/PH candidates exempted) drawn on any scheduled Bank payable at Bhilai favg. Ferro Scrap Nigam Ltd., Bhilai may be sent through Post only to General Manager (P&A), Ferro Scrap Nigam Limited, Post Box No. 37, FSNL Bhawan, Equipment Chowk, Central Avenue, Bhilai – 490001, Dist: Durg (Chhattisgarh), latest by 30/10/2008. Incomplete applications may be rejected summarily. No applications will be received after the last date of receipt of application. We do not take any responsibility for postal delay, if any.

The applications should be made exactly as per the above format and canvassing in any manner would disqualify the candidature.

For details regarding qualifications, experience, age etc. visit: http://fsnl.nic.in/html/ADVER.PDF

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Post Graduate Diploma In VLSI Design

DOEACC Centre Calicut

VL 500: Post Graduate Diploma In VLSI Design (Duration : 6 months, Fees: Rs. 38,000/-)


Course : PG Diploma in VLSI Design -Updated Syllabus

Course Code : VL500

Course Starting Date : 25-August-2008

Preamble:

VLSI (Very Large Scale Integration) technology has emerged as a very important technology in modern electronics featuring deep sub micron manufacturing processes, low voltage operations, exploding speeds and smart programmable devices sufficient enough to digest ambient conditions to extremes. The electronics industry worldwide is rapidly approaching another revolutionary leap in the global market scenario. Semiconductor technology has crossed the quarter-micron threshold, making tens of millions of transistors available on a single chip equipped with the powerful arm of VLSI design. This imparts the electronics industry a potential to create designs of incredible densities and lightning speeds while utilizing batteries to power them. This has had a phenomenal impact on widespread applications ranging from consumer electronics, communications, and defense to just about everything.


Objective of the Course:

The PG Diploma in VLSI Design is intended to impart training in designing complex digital systems using integrated circuit cells as building blocks and employing hierarchical design methods. Emphasis of the teaching curriculum is on design methodology and practicable applications. The course contents have been designed keeping in view the emerging trends in the field of VLSI design technology and emerging needs for skilled manpower.

Outcome of the Course:

This course is structured to provide the students knowledge in Design of Digital Systems, System Architectures, Hardware description Languages required for VLSI Design such as VHDL and Verilog. The students shall learn how to program and test programs on FPGAs, CPLDs etc. The students shall get exposure to the Various ASIC Design Issues, CMOS Technology, VLSI Design techniques.


Eligibility
B.E./B.Tech in Electronics/Electronics & Communication/Electrical/Instrumentation & Computer Science or M.Sc. (Electronics).

To see the course prospectus or to download the application form, please click on the corresponding links.

VL500-CourseProspectus
Download Application Form


For more details, visit http://www.cedtic.com/html/course/VL500.html

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